!new! — Gpmc
In the world of embedded Linux and high-performance microcontrollers, interfacing with external memory or peripheral chips often feels like a battle against timing constraints. Enter the GPMC (General Purpose Memory Controller). While it might not be as flashy as a GPU or as talked about as a PCIe bus, the GPMC is one of the most versatile and powerful peripherals found on Texas Instruments’ Sitara processors (like the AM335x, AM437x) and OMAP platforms.
// Timing (values in nanoseconds or cycles) gpmc,sync-clk-ps = <10000>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <60>; gpmc,cs-wr-off-ns = <60>; gpmc,oe-on-ns = <10>; gpmc,oe-off-ns = <50>; gpmc,we-on-ns = <10>; gpmc,we-off-ns = <50>; gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <10>; gpmc,adv-wr-off-ns = <10>; }; }; The GPMC is the unsung hero of industrial embedded systems. In an era of high-speed serial interfaces, the parallel memory controller remains relevant because of its deterministic latency, raw bandwidth, and ability to memory-map custom FPGA logic. In the world of embedded Linux and high-performance
If you are designing a system that requires bridging the gap between an ARM CPU and high-speed parallel hardware, master the GPMC. It is complex, it is finicky, but once you dial in those timing registers, it becomes an invisible, zero-wait-state extension of your CPU core. // Timing (values in nanoseconds or cycles) gpmc,sync-clk-ps
If you have ever needed to connect an FPGA, an old-school parallel ADC, an Ethernet controller, or even an external NOR flash to a processor without writing bit-banging GPIO code, the GPMC is your best friend. At its core, the GPMC is a hardware memory controller that acts as a bridge between the processor’s internal memory bus and external memory-mapped devices. To the CPU, reading from an external FPGA or writing to an LCD controller looks exactly like reading from a local RAM address—thanks to the GPMC. It is complex, it is finicky, but once
&gpmc { ranges = <0 0 0x08000000 0x01000000>; // CS0 at 0x08000000, 16MB nor_flash@0,0 { compatible = "cfi-flash"; reg = <0 0 0x01000000>; bank-width = <2>; // 16-bit (2 bytes) gpmc,device-width = <2>;
Have you fought with GPMC timing lately? Keep a logic analyzer handy and always double-check your gpmc,clk-activation-ns values.